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Tue, 05 Jun 2007
SuperH 7751 (sh-4) limitations.
Main one is full absence of locking instructions (or instructions,
which automatically locks memory region access like ppc lwarx/stwcx
or lock prefix for x86),
which means that any atomic operation must contain
irq disable/enable code. Furthermore, it is impossible
to create a spinlock, which can serialize parallel execution on
several CPUs.
It is possible to workaround the problem using locked PIO access,
but that is very slow.
Likely SuperH SMP will only support newer CPU family. SuperH SMP support
is scheduled for 2.6.23 timeframe.
/devel/sh :: Link / Comments (0)
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